Numerical simulation of electric fields for TEER "brain on a chip

Abstract

Trans-endothelial/epithelial electrical resistance (TEER) is one of the most widely used non-invasive readouts for assessing barrier integrity in organ-on-a-chip systems, including "brain on a chip" platforms that reproduce the blood-brain barrier or the blood-cerebrospinal fluid barrier in vitro. Since TEER values are highly sensitive to the geometry of the microfluidic chip and the placement of the measuring electrodes, reliable interpretation of experimental readings requires a clear understanding of how the electric field is actually distributed inside the device. This work discusses a numerical simulation of the electric field distribution in a TEER-integrated "brain on a chip" device with a fixed chip geometry, performed using the finite element method. The simulation is carried out in the frequency domain, with complex-valued quantities used to account for the impedance of the culture medium and the chip materials at different excitation frequencies, allowing the resistance between the measuring electrodes to be calculated for the given electrode configuration and channel geometry. As a result, a numerical model has been built that reproduces the frequency-dependent electric field behavior inside the chip and predicts the resistance values obtained in control measurements performed on the empty chip without cells, showing good agreement with the experimental data. This provides a reliable baseline for interpreting TEER data once cells are introduced into the chip. The proposed approach can improve the accuracy and reproducibility of TEER-based barrier-integrity assessment in organ-on-a-chip and brain-on-a-chip devices.

Speaker

Kovalev Maksim
Center for Soft Matter and Physics of Fluids, Bauman Moscow State Technical University, Moscow, Russia
Russia

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